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| author | Muhammad Omair Javaid <omair.javaid@linaro.org> | 2019-12-06 22:12:39 +0500 |
|---|---|---|
| committer | Muhammad Omair Javaid <omair.javaid@linaro.org> | 2019-12-06 22:18:57 +0500 |
| commit | b6f9d7b8fb2eb6b78ac93ebd5ea4e36c04469285 (patch) | |
| tree | a7a006918c7d93a7332fa27dabaf185b96cabaf9 /lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h | |
| parent | 03a242bd41ee49e17f8da96af9787d13e7ea2b93 (diff) | |
| download | bcm5719-llvm-b6f9d7b8fb2eb6b78ac93ebd5ea4e36c04469285.tar.gz bcm5719-llvm-b6f9d7b8fb2eb6b78ac93ebd5ea4e36c04469285.zip | |
Cleanup and speedup NativeRegisterContextLinux_arm64
Summary:
This patch simplifies register accesses in NativeRegisterContextLinux_arm64
and also adds some bare minimum caching to avoid multiple calls to ptrace
during a stop.
Linux ptrace returns data in the form of structures containing GPR/FPR data.
This means that one single call is enough to read all GPRs or FPRs. We do
that once per stop and keep reading from or writing to the buffer that we
have in NativeRegisterContextLinux_arm64 class. Before a resume or detach we
write all buffers back.
This is tested on aarch64 thunder x1 with Ubuntu 18.04. Also tested
regressions on x86_64.
Reviewers: labath, clayborg
Reviewed By: labath
Subscribers: kristof.beyls, lldb-commits
Differential Revision: https://reviews.llvm.org/D69371
Diffstat (limited to 'lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h')
| -rw-r--r-- | lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h index 5bbe5ecbbbc..f7c501a9fdf 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h @@ -40,6 +40,8 @@ public: Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; + void InvalidateAllRegisters() override; + // Hardware breakpoints/watchpoint management functions uint32_t NumSupportedHardwareBreakpoints() override; @@ -77,11 +79,6 @@ public: enum DREGType { eDREGTypeWATCH = 0, eDREGTypeBREAK }; protected: - Status DoReadRegisterValue(uint32_t offset, const char *reg_name, - uint32_t size, RegisterValue &value) override; - - Status DoWriteRegisterValue(uint32_t offset, const char *reg_name, - const RegisterValue &value) override; Status ReadGPR() override; @@ -125,8 +122,17 @@ private: uint32_t fpcr; }; - uint64_t m_gpr_arm64[k_num_gpr_registers_arm64]; // 64-bit general purpose - // registers. + struct GPR { + uint64_t x[31]; + uint64_t sp; + uint64_t pc; + uint64_t pstate; + }; + + bool m_gpr_is_valid; + bool m_fpu_is_valid; + + GPR m_gpr_arm64; // 64-bit general purpose registers. RegInfo m_reg_info; FPU m_fpr; // floating-point registers including extended register sets. |

