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author | Omair Javaid <omair.javaid@linaro.org> | 2015-08-25 18:22:04 +0000 |
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committer | Omair Javaid <omair.javaid@linaro.org> | 2015-08-25 18:22:04 +0000 |
commit | 2441aecd1e00d03d1b43363ea1a98c3aac00f5cf (patch) | |
tree | d7460897802c5183bc6027fce69bbdfc6d82b360 /lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h | |
parent | 74958d6071bf5f3288736d6644c53dd7d5200ab1 (diff) | |
download | bcm5719-llvm-2441aecd1e00d03d1b43363ea1a98c3aac00f5cf.tar.gz bcm5719-llvm-2441aecd1e00d03d1b43363ea1a98c3aac00f5cf.zip |
Adds support for hardware watchpoints on Arm targets.
http://reviews.llvm.org/D9703
This updated patches correct problems in arm hardware watchpoint support patch posted earlier.
This patch has been tested on samsung chromebook (ARM - Linux) and PandaBoard using basic watchpoint test application.
Also it was tested on Nexus 7 Android device.
On chromebook linux we are able to set and clear all types of watchpoints but on android we end up getting a watchpoint packet error because we are not able to call hardware watchpoint ptrace functions successfully.
llvm-svn: 245961
Diffstat (limited to 'lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h')
-rw-r--r-- | lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h index 0d235280f31..e0b4df5754c 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h @@ -48,6 +48,47 @@ namespace process_linux { Error WriteAllRegisterValues (const lldb::DataBufferSP &data_sp) override; + //------------------------------------------------------------------ + // Hardware breakpoints/watchpoint mangement functions + //------------------------------------------------------------------ + + uint32_t + SetHardwareBreakpoint (lldb::addr_t addr, size_t size) override; + + bool + ClearHardwareBreakpoint (uint32_t hw_idx) override; + + uint32_t + NumSupportedHardwareWatchpoints () override; + + uint32_t + SetHardwareWatchpoint (lldb::addr_t addr, size_t size, uint32_t watch_flags) override; + + bool + ClearHardwareWatchpoint (uint32_t hw_index) override; + + Error + ClearAllHardwareWatchpoints () override; + + Error + GetWatchpointHitIndex(uint32_t &wp_index, lldb::addr_t trap_addr) override; + + lldb::addr_t + GetWatchpointAddress (uint32_t wp_index) override; + + uint32_t + GetWatchpointSize(uint32_t wp_index); + + bool + WatchpointIsEnabled(uint32_t wp_index); + + // Debug register type select + enum DREGType + { + eDREGTypeWATCH = 0, + eDREGTypeBREAK + }; + protected: void* GetGPRBuffer() override { return &m_gpr_arm; } @@ -94,11 +135,32 @@ namespace process_linux { RegInfo m_reg_info; FPU m_fpr; + // Debug register info for hardware breakpoints and watchpoints management. + struct DREG + { + lldb::addr_t address; // Breakpoint/watchpoint address value. + uint32_t control; // Breakpoint/watchpoint control value. + uint32_t refcount; // Serves as enable/disable and refernce counter. + }; + + struct DREG m_hbr_regs[16]; // Arm native linux hardware breakpoints + struct DREG m_hwp_regs[16]; // Arm native linux hardware watchpoints + + uint32_t m_max_hwp_supported; + uint32_t m_max_hbp_supported; + bool m_refresh_hwdebug_info; + bool IsGPR(unsigned reg) const; bool IsFPR(unsigned reg) const; + + Error + ReadHardwareDebugInfo(); + + Error + WriteHardwareDebugRegs(int hwbType, int hwb_index); }; } // namespace process_linux |