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| author | Craig Topper <craig.topper@intel.com> | 2018-06-08 21:50:08 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-06-08 21:50:08 +0000 |
| commit | 88097d93555ef61cd43b5532870cf5d2f6564f5c (patch) | |
| tree | 14f3aeb910a4467c8318b44cb0f14b3ffa1713bb /lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp | |
| parent | 5f50f338064295d9b3f9b5d9ed73f4601d2e226f (diff) | |
| download | bcm5719-llvm-88097d93555ef61cd43b5532870cf5d2f6564f5c.tar.gz bcm5719-llvm-88097d93555ef61cd43b5532870cf5d2f6564f5c.zip | |
[X86] Add back some masked vector truncate builtins. Custom IRgen a a few others.
I'd like to make the select builtins require an avx512f, avx512bw, or avx512vl fature to match what is normally required to get masking. Truncate is special in that there are instructions with a 128/256-bit masked result even without avx512vl.
By using special buitlins we can emit a select without using the 128/256-bit select builtins.
llvm-svn: 334331
Diffstat (limited to 'lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp')
0 files changed, 0 insertions, 0 deletions
