Reflow paragraphs in comments.

This is intended as a clean up after the big clang-format commit
(r280751), which unfortunately resulted in many of the comment
paragraphs in LLDB being very hard to read.

FYI, the script I used was:

import textwrap
import commands
import os
import sys
import re
tmp = "%s.tmp"%sys.argv[1]
out = open(tmp, "w+")
with open(sys.argv[1], "r") as f:
  header = ""
  text = ""
  comment = re.compile(r'^( *//) ([^ ].*)$')
  special = re.compile(r'^((([A-Z]+[: ])|([0-9]+ )).*)|(.*;)$')
  for line in f:
      match = comment.match(line)
      if match and not special.match(match.group(2)):
          # skip intentionally short comments.
          if not text and len(match.group(2)) < 40:
              out.write(line)
              continue

          if text:
              text += " " + match.group(2)
          else:
              header = match.group(1)
              text = match.group(2)

          continue

      if text:
          filled = textwrap.wrap(text, width=(78-len(header)),
                                 break_long_words=False)
          for l in filled:
              out.write(header+" "+l+'\n')
              text = ""

      out.write(line)

os.rename(tmp, sys.argv[1])

Differential Revision: https://reviews.llvm.org/D46144

llvm-svn: 331197

1 files changed, 19 insertions, 25 deletions

diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
index cb05416cb6c..74929168462 100644
--- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
+++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
@@ -184,14 +184,14 @@ NativeRegisterContextLinux_arm::ReadRegister(const RegisterInfo *reg_info,
     error = ReadRegisterRaw(full_reg, reg_value);
 
     if (error.Success()) {
-      // If our read was not aligned (for ah,bh,ch,dh), shift our returned value
-      // one byte to the right.
+      // If our read was not aligned (for ah,bh,ch,dh), shift our returned
+      // value one byte to the right.
       if (is_subreg && (reg_info->byte_offset & 0x1))
         reg_value.SetUInt64(reg_value.GetAsUInt64() >> 8);
 
       // If our return byte size was greater than the return value reg size,
-      // then
-      // use the type specified by reg_info rather than the uint64_t default
+      // then use the type specified by reg_info rather than the uint64_t
+      // default
       if (reg_value.GetByteSize() > reg_info->byte_size)
         reg_value.SetType(reg_info);
     }
@@ -558,8 +558,8 @@ uint32_t NativeRegisterContextLinux_arm::SetHardwareWatchpoint(
   uint32_t control_value = 0, wp_index = 0, addr_word_offset = 0, byte_mask = 0;
   lldb::addr_t real_addr = addr;
 
-  // Check if we are setting watchpoint other than read/write/access
-  // Also update watchpoint flag to match Arm write-read bit configuration.
+  // Check if we are setting watchpoint other than read/write/access Also
+  // update watchpoint flag to match Arm write-read bit configuration.
   switch (watch_flags) {
   case 1:
     watch_flags = 2;
@@ -579,9 +579,9 @@ uint32_t NativeRegisterContextLinux_arm::SetHardwareWatchpoint(
   if (size == 0 || size > 4)
     return LLDB_INVALID_INDEX32;
 
-  // Check 4-byte alignment for hardware watchpoint target address.
-  // Below is a hack to recalculate address and size in order to
-  // make sure we can watch non 4-byte alligned addresses as well.
+  // Check 4-byte alignment for hardware watchpoint target address. Below is a
+  // hack to recalculate address and size in order to make sure we can watch
+  // non 4-byte alligned addresses as well.
   if (addr & 0x03) {
     uint8_t watch_mask = (addr & 0x03) + size;
 
@@ -874,12 +874,10 @@ Status NativeRegisterContextLinux_arm::DoReadRegisterValue(
     uint32_t offset, const char *reg_name, uint32_t size,
     RegisterValue &value) {
   // PTRACE_PEEKUSER don't work in the aarch64 linux kernel used on android
-  // devices (always return
-  // "Bad address"). To avoid using PTRACE_PEEKUSER we read out the full GPR
-  // register set instead.
-  // This approach is about 4 times slower but the performance overhead is
-  // negligible in
-  // comparision to processing time in lldb-server.
+  // devices (always return "Bad address"). To avoid using PTRACE_PEEKUSER we
+  // read out the full GPR register set instead. This approach is about 4 times
+  // slower but the performance overhead is negligible in comparision to
+  // processing time in lldb-server.
   assert(offset % 4 == 0 && "Try to write a register with unaligned offset");
   if (offset + sizeof(uint32_t) > sizeof(m_gpr_arm))
     return Status("Register isn't fit into the size of the GPR area");
@@ -895,13 +893,10 @@ Status NativeRegisterContextLinux_arm::DoReadRegisterValue(
 Status NativeRegisterContextLinux_arm::DoWriteRegisterValue(
     uint32_t offset, const char *reg_name, const RegisterValue &value) {
   // PTRACE_POKEUSER don't work in the aarch64 linux kernel used on android
-  // devices (always return
-  // "Bad address"). To avoid using PTRACE_POKEUSER we read out the full GPR
-  // register set, modify
-  // the requested register and write it back. This approach is about 4 times
-  // slower but the
-  // performance overhead is negligible in comparision to processing time in
-  // lldb-server.
+  // devices (always return "Bad address"). To avoid using PTRACE_POKEUSER we
+  // read out the full GPR register set, modify the requested register and
+  // write it back. This approach is about 4 times slower but the performance
+  // overhead is negligible in comparision to processing time in lldb-server.
   assert(offset % 4 == 0 && "Try to write a register with unaligned offset");
   if (offset + sizeof(uint32_t) > sizeof(m_gpr_arm))
     return Status("Register isn't fit into the size of the GPR area");
@@ -915,9 +910,8 @@ Status NativeRegisterContextLinux_arm::DoWriteRegisterValue(
   // will clear thumb bit of new PC if we are already in thumb mode; that is
   // CPSR thumb mode bit is set.
   if (offset / sizeof(uint32_t) == gpr_pc_arm) {
-    // Check if we are already in thumb mode and
-    // thumb bit of current PC is read out to be zero and
-    // thumb bit of next PC is read out to be one.
+    // Check if we are already in thumb mode and thumb bit of current PC is
+    // read out to be zero and thumb bit of next PC is read out to be one.
     if ((m_gpr_arm[gpr_cpsr_arm] & 0x20) && !(m_gpr_arm[gpr_pc_arm] & 0x01) &&
         (value.GetAsUInt32() & 0x01)) {
       reg_value &= (~1ull);