[MIPS][lldb-server] Add 32-bit register context and read/write FP registers on mips64

    - Added support for read/write FP registers in FR1 mode.
    - Added 32 bit register context for mips32.

Reviewers: clayborg, tberghammer, jaydeep
Subscribers: emaste, nitesh.jain, bhushan, mohit.bhakkad, lldb-commits
Differential Revision: http://reviews.llvm.org/D10029

llvm-svn: 238914

1 files changed, 4 insertions, 0 deletions

diff --git a/lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp b/lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
index 210888b2118..c1800003551 100644
--- a/lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
+++ b/lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
@@ -2991,6 +2991,8 @@ NativeProcessLinux::GetSoftwareBreakpointPCOffset (NativeRegisterContextSP conte
 
         case llvm::Triple::mips64:
         case llvm::Triple::mips64el:
+        case llvm::Triple::mips:
+        case llvm::Triple::mipsel:
             actual_opcode_size = static_cast<uint32_t> (sizeof(g_mips64_opcode));
             return Error ();
         
@@ -3054,11 +3056,13 @@ NativeProcessLinux::GetSoftwareBreakpointTrapOpcode (size_t trap_opcode_size_hin
         actual_opcode_size = sizeof(g_i386_opcode);
         return Error ();
 
+    case llvm::Triple::mips:
     case llvm::Triple::mips64:
         trap_opcode_bytes = g_mips64_opcode;
         actual_opcode_size = sizeof(g_mips64_opcode);
         return Error ();
 
+    case llvm::Triple::mipsel:
     case llvm::Triple::mips64el:
         trap_opcode_bytes = g_mips64el_opcode;
         actual_opcode_size = sizeof(g_mips64el_opcode);