diff options
author | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2017-11-10 08:46:26 +0000 |
---|---|---|
committer | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2017-11-10 08:46:26 +0000 |
commit | 4b017e682d7bc7ce9412f0653e862447be086545 (patch) | |
tree | ba6a0f08f565acdb536d32dd604e2a4303966e89 /lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp | |
parent | 1a0da2db5f341a44490c6825fdf98717224e5024 (diff) | |
download | bcm5719-llvm-4b017e682d7bc7ce9412f0653e862447be086545.tar.gz bcm5719-llvm-4b017e682d7bc7ce9412f0653e862447be086545.zip |
[RegAlloc, SystemZ] Increase number of LOCRs by passing "hard" regalloc hints.
* The method getRegAllocationHints() is now of bool type instead of void. If
true is returned, regalloc (AllocationOrder) will *only* try to allocate the
hints, as opposed to merely trying them before non-hinted registers.
* TargetRegisterInfo::getRegAllocationHints() is implemented for SystemZ with
an increase in number of LOCRs.
In this case, it is desired to force the hints even though there is a slight
increase in spilling, because if a non-hinted register would be allocated,
the LOCRMux pseudo would have to be expanded with a jump sequence. The LOCR
(Load On Condition) SystemZ instruction must have both operands in either the
low or high part of the 64 bit register.
Reviewers: Quentin Colombet and Ulrich Weigand
https://reviews.llvm.org/D36795
llvm-svn: 317879
Diffstat (limited to 'lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp')
0 files changed, 0 insertions, 0 deletions