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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-04-04 23:44:46 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-04-04 23:44:46 +0000 |
| commit | 7b0d947404cf4e5faba84de0a2e29da5127a3a83 (patch) | |
| tree | 69c13c7ae5afbd981062f1323fa24bc1200263ad /lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.h | |
| parent | e33bc31df448c21ad0728b9aec46f9355acc9926 (diff) | |
| download | bcm5719-llvm-7b0d947404cf4e5faba84de0a2e29da5127a3a83.tar.gz bcm5719-llvm-7b0d947404cf4e5faba84de0a2e29da5127a3a83.zip | |
Allow targets to opt-in to codegen in SCC order
Decouple this setting from EnableIRPA.
To support function calls on AMDGPU, it is necessary to
report the global register usage throughout the kernel's
call graph, so callees need to be handled first.
llvm-svn: 299487
Diffstat (limited to 'lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.h')
0 files changed, 0 insertions, 0 deletions
