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author | Greg Clayton <gclayton@apple.com> | 2011-03-26 19:14:58 +0000 |
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committer | Greg Clayton <gclayton@apple.com> | 2011-03-26 19:14:58 +0000 |
commit | 357132eb9a7e47b58a097548ad484f7e4b1025a3 (patch) | |
tree | dedcb77d2866c4615dfc0e2b6df1a7c638b4b56d /lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVM.cpp | |
parent | bbbeea11a8fa600dc77d2e88a9dfe4c914ab0d1d (diff) | |
download | bcm5719-llvm-357132eb9a7e47b58a097548ad484f7e4b1025a3.tar.gz bcm5719-llvm-357132eb9a7e47b58a097548ad484f7e4b1025a3.zip |
Added the ability to get the min and max instruction byte size for
an architecture into ArchSpec:
uint32_t
ArchSpec::GetMinimumOpcodeByteSize() const;
uint32_t
ArchSpec::GetMaximumOpcodeByteSize() const;
Added an AddressClass to the Instruction class in Disassembler.h.
This allows decoded instructions to know know if they are code,
code with alternate ISA (thumb), or even data which can be mixed
into code. The instruction does have an address, but it is a good
idea to cache this value so we don't have to look it up more than
once.
Fixed an issue in Opcode::SetOpcodeBytes() where the length wasn't
getting set.
Changed:
bool
SymbolContextList::AppendIfUnique (const SymbolContext& sc);
To:
bool
SymbolContextList::AppendIfUnique (const SymbolContext& sc,
bool merge_symbol_into_function);
This function was typically being used when looking up functions
and symbols. Now if you lookup a function, then find the symbol,
they can be merged into the same symbol context and not cause
multiple symbol contexts to appear in a symbol context list that
describes the same function.
Fixed the SymbolContext not equal operator which was causing mixed
mode disassembly to not work ("disassembler --mixed --name main").
Modified the disassembler classes to know about the fact we know,
for a given architecture, what the min and max opcode byte sizes
are. The InstructionList class was modified to return the max
opcode byte size for all of the instructions in its list.
These two fixes means when disassemble a list of instructions and dump
them and show the opcode bytes, we can format the output more
intelligently when showing opcode bytes. This affects any architectures
that have varying opcode byte sizes (x86_64 and i386). Knowing the max
opcode byte size also helps us to be able to disassemble N instructions
without having to re-read data if we didn't read enough bytes.
Added the ability to set the architecture for the disassemble command.
This means you can easily cross disassemble data for any supported
architecture. I also added the ability to specify "thumb" as an
architecture so that we can force disassembly into thumb mode when
needed. In GDB this was done using a hack of specifying an odd
address when disassembling. I don't want to repeat this hack in LLDB,
so the auto detection between ARM and thumb is failing, just specify
thumb when disassembling:
(lldb) disassemble --arch thumb --name main
You can also have data in say an x86_64 file executable and disassemble
data as any other supported architecture:
% lldb a.out
Current executable set to 'a.out' (x86_64).
(lldb) b main
(lldb) run
(lldb) disassemble --arch thumb --count 2 --start-address 0x0000000100001080 --bytes
0x100001080: 0xb580 push {r7, lr}
0x100001082: 0xaf00 add r7, sp, #0
Fixed Target::ReadMemory(...) to be able to deal with Address argument object
that isn't section offset. When an address object was supplied that was
out on the heap or stack, target read memory would fail. Disassembly uses
Target::ReadMemory(...), and the example above where we disassembler thumb
opcodes in an x86 binary was failing do to this bug.
llvm-svn: 128347
Diffstat (limited to 'lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVM.cpp')
-rw-r--r-- | lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVM.cpp | 42 |
1 files changed, 27 insertions, 15 deletions
diff --git a/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVM.cpp b/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVM.cpp index 9c55042640f..59e6d9a4bb4 100644 --- a/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVM.cpp +++ b/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVM.cpp @@ -74,8 +74,10 @@ static int IPRegisterReader(uint64_t *value, unsigned regID, void* arg) return -1; } -DisassemblerLLVM::InstructionLLVM::InstructionLLVM (const Address &addr, EDDisassemblerRef disassembler) : - Instruction (addr), +DisassemblerLLVM::InstructionLLVM::InstructionLLVM (const Address &addr, + AddressClass addr_class, + EDDisassemblerRef disassembler) : + Instruction (addr, addr_class), m_disassembler (disassembler) { } @@ -99,6 +101,7 @@ void DisassemblerLLVM::InstructionLLVM::Dump ( Stream *s, + uint32_t max_opcode_byte_size, bool show_address, bool show_bytes, const lldb_private::ExecutionContext* exe_ctx, @@ -131,13 +134,19 @@ DisassemblerLLVM::InstructionLLVM::Dump // x86_64 and i386 are the only ones that use bytes right now so // pad out the byte dump to be able to always show 15 bytes (3 chars each) // plus a space - m_opcode.Dump (s, 15 * 3 + 1); + if (max_opcode_byte_size > 0) + m_opcode.Dump (s, max_opcode_byte_size * 3 + 1); + else + m_opcode.Dump (s, 15 * 3 + 1); } else { // Else, we have ARM which can show up to a uint32_t 0x00000000 (10 spaces) // plus two for padding... - m_opcode.Dump (s, 12); + if (max_opcode_byte_size > 0) + m_opcode.Dump (s, max_opcode_byte_size * 3 + 1); + else + m_opcode.Dump (s, 12); } } @@ -329,9 +338,9 @@ DisassemblerLLVM::InstructionLLVM::DoesBranch() const } size_t -DisassemblerLLVM::InstructionLLVM::Extract (const Disassembler &disassembler, - const lldb_private::DataExtractor &data, - uint32_t data_offset) +DisassemblerLLVM::InstructionLLVM::Decode (const Disassembler &disassembler, + const lldb_private::DataExtractor &data, + uint32_t data_offset) { if (EDCreateInsts(&m_inst, 1, m_disassembler, DataExtractorByteReader, data_offset, (void*)(&data))) { @@ -382,6 +391,7 @@ SyntaxForArchSpec (const ArchSpec &arch) case llvm::Triple::x86_64: return kEDAssemblySyntaxX86ATT; case llvm::Triple::arm: + case llvm::Triple::thumb: return kEDAssemblySyntaxARMUAL; default: break; @@ -411,17 +421,16 @@ DisassemblerLLVM::DisassemblerLLVM(const ArchSpec &arch) : if (EDGetDisassembler(&m_disassembler, arch_triple.c_str(), SyntaxForArchSpec (arch))) m_disassembler = NULL; llvm::Triple::ArchType llvm_arch = arch.GetTriple().getArch(); + // Don't have the lldb::Triple::thumb architecture here. If someone specifies + // "thumb" as the architecture, we want a thumb only disassembler. But if any + // architecture starting with "arm" if specified, we want to auto detect the + // arm/thumb code automatically using the AddressClass from section offset + // addresses. if (llvm_arch == llvm::Triple::arm) { if (EDGetDisassembler(&m_disassembler_thumb, "thumb-apple-darwin", kEDAssemblySyntaxARMUAL)) m_disassembler_thumb = NULL; } - else if (llvm_arch == llvm::Triple::thumb) - { - m_disassembler_thumb = m_disassembler; - if (EDGetDisassembler(&m_disassembler, "arm-apple-darwin-unknown", kEDAssemblySyntaxARMUAL)) - m_disassembler = NULL; - } } } @@ -456,15 +465,18 @@ DisassemblerLLVM::DecodeInstructions // If we have a thumb disassembler, then we have an ARM architecture // so we need to check what the instruction address class is to make // sure we shouldn't be disassembling as thumb... + AddressClass inst_address_class = eAddressClassInvalid; if (m_disassembler_thumb) { - if (inst_addr.GetAddressClass () == eAddressClassCodeAlternateISA) + inst_address_class = inst_addr.GetAddressClass (); + if (inst_address_class == eAddressClassCodeAlternateISA) use_thumb = true; } InstructionSP inst_sp (new InstructionLLVM (inst_addr, + inst_address_class, use_thumb ? m_disassembler_thumb : m_disassembler)); - size_t inst_byte_size = inst_sp->Extract (*this, data, data_offset); + size_t inst_byte_size = inst_sp->Decode (*this, data, data_offset); if (inst_byte_size == 0) break; |