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authorTom Stellard <thomas.stellard@amd.com>2014-07-02 20:53:48 +0000
committerTom Stellard <thomas.stellard@amd.com>2014-07-02 20:53:48 +0000
commitb2de94e0c640a73d863b59717bc09a305d4b5b77 (patch)
tree75e1e92e8021a76b8eee28b586733d1e64193a51 /lldb/source/Interpreter/ScriptInterpreterPython.cpp
parenta305f93d8191de1eb45978e0df93d08e72958c61 (diff)
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R600/SI: Adjsut SGPR live ranges before register allocation
SGPRs are written by instructions that sometimes will ignore control flow, which means if you have code like: if (VGPR0) { SGPR0 = S_MOV_B32 0 } else { SGPR0 = S_MOV_B32 1 } The value of SGPR0 will 1 no matter what the condition is. In order to deal with this situation correctly, we need to view the program as if it were a single basic block when we calculate the live ranges for the SGPRs. They way we actually update the live range is by iterating over all of the segments in each LiveRange object and setting the end of each segment equal to the start of the next segment. So a live range like: [3888r,9312r:0)[10032B,10384B:0) 0@3888r will become: [3888r,10032B:0)[10032B,10384B:0) 0@3888r This change will allow us to use SALU instructions within branches. llvm-svn: 212215
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