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author | Sean Callanan <scallanan@apple.com> | 2013-01-09 22:44:41 +0000 |
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committer | Sean Callanan <scallanan@apple.com> | 2013-01-09 22:44:41 +0000 |
commit | 087f437b604d627939c9e2af6f0c310c715b9019 (patch) | |
tree | b54a2c837e11acdafe3b00719c9fa88b565ac080 /lldb/source/Expression/IRInterpreter.cpp | |
parent | 95b604b27698dcc9bdb6181e1fcce90237c5a6ea (diff) | |
download | bcm5719-llvm-087f437b604d627939c9e2af6f0c310c715b9019.tar.gz bcm5719-llvm-087f437b604d627939c9e2af6f0c310c715b9019.zip |
Added emulation of shifts to the IR interpreter.
<rdar://problem/12978619>
llvm-svn: 172013
Diffstat (limited to 'lldb/source/Expression/IRInterpreter.cpp')
-rw-r--r-- | lldb/source/Expression/IRInterpreter.cpp | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/lldb/source/Expression/IRInterpreter.cpp b/lldb/source/Expression/IRInterpreter.cpp index f39d13522a7..2027556586a 100644 --- a/lldb/source/Expression/IRInterpreter.cpp +++ b/lldb/source/Expression/IRInterpreter.cpp @@ -1042,17 +1042,23 @@ IRInterpreter::supportsFunction (Function &llvm_function, } } break; + case Instruction::And: + case Instruction::AShr: case Instruction::IntToPtr: case Instruction::PtrToInt: case Instruction::Load: + case Instruction::LShr: case Instruction::Mul: + case Instruction::Or: case Instruction::Ret: case Instruction::SDiv: + case Instruction::Shl: case Instruction::SRem: case Instruction::Store: case Instruction::Sub: case Instruction::UDiv: case Instruction::URem: + case Instruction::Xor: case Instruction::ZExt: break; } @@ -1139,6 +1145,12 @@ IRInterpreter::runOnFunction (lldb::ClangExpressionVariableSP &result, case Instruction::UDiv: case Instruction::SRem: case Instruction::URem: + case Instruction::Shl: + case Instruction::LShr: + case Instruction::AShr: + case Instruction::And: + case Instruction::Or: + case Instruction::Xor: { const BinaryOperator *bin_op = dyn_cast<BinaryOperator>(inst); @@ -1202,6 +1214,25 @@ IRInterpreter::runOnFunction (lldb::ClangExpressionVariableSP &result, case Instruction::URem: result = L.GetRawBits64(0) % R.GetRawBits64(1); break; + case Instruction::Shl: + result = L << R; + break; + case Instruction::AShr: + result = L >> R; + break; + case Instruction::LShr: + result = L; + result.ShiftRightLogical(R); + break; + case Instruction::And: + result = L & R; + break; + case Instruction::Or: + result = L | R; + break; + case Instruction::Xor: + result = L ^ R; + break; } frame.AssignValue(inst, result, llvm_module); |