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| author | Craig Topper <craig.topper@gmail.com> | 2016-11-26 02:14:00 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2016-11-26 02:14:00 +0000 |
| commit | 7f76c23781fa15458949ee2ea807b6e896788fc6 (patch) | |
| tree | 50fb6d6ed20245000c84edbfa01305e2ab89a990 /lldb/source/Core/ValueObjectConstResultImpl.cpp | |
| parent | 516fd7abfe8a8eb770e59e0f668d5a58ed4b66b6 (diff) | |
| download | bcm5719-llvm-7f76c23781fa15458949ee2ea807b6e896788fc6.tar.gz bcm5719-llvm-7f76c23781fa15458949ee2ea807b6e896788fc6.zip | |
[X86][XOP] Add a reversed reg/reg form for VPROT instructions.
The W bit distinquishes which operand is the memory operand. But if the mod bits are 3 then the memory operand is a register and there are two possible encodings. We already did this correctly for several other XOP instructions.
llvm-svn: 287961
Diffstat (limited to 'lldb/source/Core/ValueObjectConstResultImpl.cpp')
0 files changed, 0 insertions, 0 deletions
