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authorGreg Clayton <gclayton@apple.com>2011-07-06 04:07:21 +0000
committerGreg Clayton <gclayton@apple.com>2011-07-06 04:07:21 +0000
commit34132754bdfd94be8199945b3f4c8dbe8bd67cf3 (patch)
treea5484c20520094a78a9d9cc93656d414f9df6dc2 /lldb/source/Core/RegisterValue.cpp
parenta98034a25e3084073f1068568e1d1b95ed243f71 (diff)
downloadbcm5719-llvm-34132754bdfd94be8199945b3f4c8dbe8bd67cf3.tar.gz
bcm5719-llvm-34132754bdfd94be8199945b3f4c8dbe8bd67cf3.zip
Fixed some issues with ARM backtraces by not processing any push/pop
instructions if they are conditional. Also fixed issues where the PC wasn't getting bit zero stripped for ARM targets when a stack frame was thumb. We now properly call through the GetOpcodeLoadAddress() functions to make sure the addresses are properly stripped for any targets that may decorate up their addresses. We now don't pass the SIGSTOP signals along. We can revisit this soon, but currently this was interfering with debugging some older ARM targets that don't have vCont support in the GDB server. llvm-svn: 134461
Diffstat (limited to 'lldb/source/Core/RegisterValue.cpp')
-rw-r--r--lldb/source/Core/RegisterValue.cpp147
1 files changed, 147 insertions, 0 deletions
diff --git a/lldb/source/Core/RegisterValue.cpp b/lldb/source/Core/RegisterValue.cpp
index 963027154bb..e8638b3e678 100644
--- a/lldb/source/Core/RegisterValue.cpp
+++ b/lldb/source/Core/RegisterValue.cpp
@@ -1000,3 +1000,150 @@ RegisterValue::operator != (const RegisterValue &rhs) const
return true;
}
+bool
+RegisterValue::ClearBit (uint32_t bit)
+{
+ switch (m_type)
+ {
+ case eTypeInvalid:
+ break;
+
+ case eTypeUInt8:
+ if (bit < 8)
+ {
+ m_data.uint8 &= ~(1u << bit);
+ return true;
+ }
+ break;
+
+ case eTypeUInt16:
+ if (bit < 16)
+ {
+ m_data.uint16 &= ~(1u << bit);
+ return true;
+ }
+ break;
+
+ case eTypeUInt32:
+ if (bit < 32)
+ {
+ m_data.uint32 &= ~(1u << bit);
+ return true;
+ }
+ break;
+
+ case eTypeUInt64:
+ if (bit < 64)
+ {
+ m_data.uint64 &= ~(1ull << (uint64_t)bit);
+ return true;
+ }
+ break;
+#if defined (ENABLE_128_BIT_SUPPORT)
+ case eTypeUInt128:
+ if (bit < 64)
+ {
+ m_data.uint128 &= ~((__uint128_t)1ull << (__uint128_t)bit);
+ return true;
+ }
+#endif
+ case eTypeFloat:
+ case eTypeDouble:
+ case eTypeLongDouble:
+ break;
+
+ case eTypeBytes:
+ if (m_data.buffer.byte_order == eByteOrderBig || m_data.buffer.byte_order == eByteOrderLittle)
+ {
+ uint32_t byte_idx;
+ if (m_data.buffer.byte_order == eByteOrderBig)
+ byte_idx = m_data.buffer.length - (bit / 8) - 1;
+ else
+ byte_idx = bit / 8;
+
+ const uint32_t byte_bit = bit % 8;
+ if (byte_idx < m_data.buffer.length)
+ {
+ m_data.buffer.bytes[byte_idx] &= ~(1u << byte_bit);
+ return true;
+ }
+ }
+ break;
+ }
+ return false;
+}
+
+
+bool
+RegisterValue::SetBit (uint32_t bit)
+{
+ switch (m_type)
+ {
+ case eTypeInvalid:
+ break;
+
+ case eTypeUInt8:
+ if (bit < 8)
+ {
+ m_data.uint8 |= (1u << bit);
+ return true;
+ }
+ break;
+
+ case eTypeUInt16:
+ if (bit < 16)
+ {
+ m_data.uint16 |= (1u << bit);
+ return true;
+ }
+ break;
+
+ case eTypeUInt32:
+ if (bit < 32)
+ {
+ m_data.uint32 |= (1u << bit);
+ return true;
+ }
+ break;
+
+ case eTypeUInt64:
+ if (bit < 64)
+ {
+ m_data.uint64 |= (1ull << (uint64_t)bit);
+ return true;
+ }
+ break;
+#if defined (ENABLE_128_BIT_SUPPORT)
+ case eTypeUInt128:
+ if (bit < 64)
+ {
+ m_data.uint128 |= ((__uint128_t)1ull << (__uint128_t)bit);
+ return true;
+ }
+#endif
+ case eTypeFloat:
+ case eTypeDouble:
+ case eTypeLongDouble:
+ break;
+
+ case eTypeBytes:
+ if (m_data.buffer.byte_order == eByteOrderBig || m_data.buffer.byte_order == eByteOrderLittle)
+ {
+ uint32_t byte_idx;
+ if (m_data.buffer.byte_order == eByteOrderBig)
+ byte_idx = m_data.buffer.length - (bit / 8) - 1;
+ else
+ byte_idx = bit / 8;
+
+ const uint32_t byte_bit = bit % 8;
+ if (byte_idx < m_data.buffer.length)
+ {
+ m_data.buffer.bytes[byte_idx] |= (1u << byte_bit);
+ return true;
+ }
+ }
+ break;
+ }
+ return false;
+}
+
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