summaryrefslogtreecommitdiffstats
path: root/lldb/source/Core/Disassembler.cpp
diff options
context:
space:
mode:
authorJason Molenda <jmolenda@apple.com>2015-08-21 00:13:37 +0000
committerJason Molenda <jmolenda@apple.com>2015-08-21 00:13:37 +0000
commit6d9fe8c156f49ca4cd4404473f9115701f9b4581 (patch)
treed4395a3a7d997e67b74491c78a7f38a49a4dbfd4 /lldb/source/Core/Disassembler.cpp
parent6002295c6a7b53e35b012410d6d3240e729b6f65 (diff)
downloadbcm5719-llvm-6d9fe8c156f49ca4cd4404473f9115701f9b4581.tar.gz
bcm5719-llvm-6d9fe8c156f49ca4cd4404473f9115701f9b4581.zip
The llvm Triple for an armv6m now comes back as llvm::Triple::thumb.
This was breaking disassembly for arm machines that we force to be thumb mode all the time because we were only checking for llvm::Triple::arm. i.e. armv6m (ARM Cortex-M0) armv7m (ARM Cortex-M3) armv7em (ARM Cortex-M4) <rdar://problem/22334522> llvm-svn: 245645
Diffstat (limited to 'lldb/source/Core/Disassembler.cpp')
-rw-r--r--lldb/source/Core/Disassembler.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lldb/source/Core/Disassembler.cpp b/lldb/source/Core/Disassembler.cpp
index f96232fccee..e6669f558fb 100644
--- a/lldb/source/Core/Disassembler.cpp
+++ b/lldb/source/Core/Disassembler.cpp
@@ -1264,7 +1264,7 @@ Disassembler::Disassembler(const ArchSpec& arch, const char *flavor) :
// If this is an arm variant that can only include thumb (T16, T32)
// instructions, force the arch triple to be "thumbv.." instead of
// "armv..."
- if (arch.GetTriple().getArch() == llvm::Triple::arm
+ if ((arch.GetTriple().getArch() == llvm::Triple::arm || arch.GetTriple().getArch() == llvm::Triple::thumb)
&& (arch.GetCore() == ArchSpec::Core::eCore_arm_armv7m
|| arch.GetCore() == ArchSpec::Core::eCore_arm_armv7em
|| arch.GetCore() == ArchSpec::Core::eCore_arm_armv6m))
OpenPOWER on IntegriCloud