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| author | Javed Absar <javed.absar@arm.com> | 2017-02-02 21:08:12 +0000 |
|---|---|---|
| committer | Javed Absar <javed.absar@arm.com> | 2017-02-02 21:08:12 +0000 |
| commit | bb8dcc6aec4071c114ed4205f01c9163dbd1bf00 (patch) | |
| tree | 99dee882dc6421266d4b7b6932711a6d515a059e /lldb/source/Core/AddressResolver.cpp | |
| parent | 5725f56bb0ec5e6b54edd59ab5bafa0e17702071 (diff) | |
| download | bcm5719-llvm-bb8dcc6aec4071c114ed4205f01c9163dbd1bf00.tar.gz bcm5719-llvm-bb8dcc6aec4071c114ed4205f01c9163dbd1bf00.zip | |
[ARM] Classification Improvements to ARM Sched-Model. NFCI.
This is the second in the series of patches to enable adding
of machine sched-models for ARM processors easier and compact.
This patch focuses on integer instructions and adds missing
sched definitions.
Reviewers: rovka, rengolin
Differential Revision: https://reviews.llvm.org/D29127
llvm-svn: 293935
Diffstat (limited to 'lldb/source/Core/AddressResolver.cpp')
0 files changed, 0 insertions, 0 deletions
