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authorVolodymyr Turanskyy <volodymyr.turanskyy@arm.com>2018-07-04 16:11:15 +0000
committerVolodymyr Turanskyy <volodymyr.turanskyy@arm.com>2018-07-04 16:11:15 +0000
commit17c0c4e7424187c50c3189566aa3432cee7cdc9a (patch)
treecfa930e83ce5aad5e1943d33277b74cbf15e7aaf /lldb/scripts/Python/python-extensions.swig
parenteaececf5e0c4c566838cf2bada8599e6346e59e7 (diff)
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[ARM] [Assembler] Support negative immediates: cover few missing cases
Support for negative immediates was implemented in https://reviews.llvm.org/rL298380, however few instruction options were missing. This change adds negative immediates support and respective tests for the following: ADD ADDS ADDS.W AND.W ANDS BIC.W BICS BICS.W SUB SUBS SUBS.W Differential Revision: https://reviews.llvm.org/D48649 llvm-svn: 336286
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