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authorMatthias Braun <matze@braunis.de>2015-04-23 23:24:36 +0000
committerMatthias Braun <matze@braunis.de>2015-04-23 23:24:36 +0000
commit43fb8a157b270e70d553231c8561a2efd012c774 (patch)
tree048d7dca4e10e4a18d3a806111fd229179a35984 /lldb/scripts/Python/finishSwigPythonLLDB.py
parent5c5facc2ce1b8469494e37c07f69223e3bc45d2c (diff)
downloadbcm5719-llvm-43fb8a157b270e70d553231c8561a2efd012c774.tar.gz
bcm5719-llvm-43fb8a157b270e70d553231c8561a2efd012c774.zip
RegisterCoalescer: Avoid unnecessary register class widening for some rematerializations
I couldn't provide a testcase as none of the public targets has wide register classes with alot of subregisters and at the same time an instruction which "ReMaterializable" and "AsCheapAsAMove" (could probably be added for R600). llvm-svn: 235668
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