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| author | Jim Grosbach <grosbach@apple.com> | 2012-04-10 17:31:55 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2012-04-10 17:31:55 +0000 |
| commit | df5a244797e7be6bb44a863402b7138e663c146d (patch) | |
| tree | 346340dfe96310eaed750c3c9e9785e4e5c2aaae /lldb/scripts/Python/edit-swig-python-wrapper-file.py | |
| parent | ca5c597fd017578d7ba5ad536d0c4f6832ffc85a (diff) | |
| download | bcm5719-llvm-df5a244797e7be6bb44a863402b7138e663c146d.tar.gz bcm5719-llvm-df5a244797e7be6bb44a863402b7138e663c146d.zip | |
ARM fix cc_out operand handling for t2SUBrr instructions.
We were incorrectly conflating some add variants which don't have a
cc_out operand with the mirroring sub encodings, which do. Part of the
awesome non-orthogonality legacy of thumb1. Similarly, handling of
add/sub of an immediate was sometimes incorrectly removing the cc_out
operand for add/sub register variants.
rdar://11216577
llvm-svn: 154411
Diffstat (limited to 'lldb/scripts/Python/edit-swig-python-wrapper-file.py')
0 files changed, 0 insertions, 0 deletions
