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| author | Evan Cheng <evan.cheng@apple.com> | 2011-12-14 20:00:08 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-12-14 20:00:08 +0000 |
| commit | da103bf9ecfcdeb4292b2920c908a416a8b105b4 (patch) | |
| tree | 6893e2dff2a6d73ca233197c24b623aa1a945d0d /lldb/scripts/Python/edit-swig-python-wrapper-file.py | |
| parent | 93237e4808f8779b71bccc727338312bb0ef9d50 (diff) | |
| download | bcm5719-llvm-da103bf9ecfcdeb4292b2920c908a416a8b105b4.tar.gz bcm5719-llvm-da103bf9ecfcdeb4292b2920c908a416a8b105b4.zip | |
Model ARM predicated write as read-mod-write. e.g.
r0 = mov #0
r0 = moveq #1
Then the second instruction has an implicit data dependency on the first
instruction. Sadly I have yet to come up with a small test case that
demonstrate the post-ra scheduler taking advantage of this.
llvm-svn: 146583
Diffstat (limited to 'lldb/scripts/Python/edit-swig-python-wrapper-file.py')
0 files changed, 0 insertions, 0 deletions
