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authorMatt Arsenault <Matthew.Arsenault@amd.com>2019-07-19 14:15:18 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2019-07-19 14:15:18 +0000
commitfecf43eba3630aeb55c56e5d308f99a7bd05bfbe (patch)
treef65a92ab47e7aed8b45afa1e0396de4197491f85 /lldb/packages/Python
parent3fd917d8860e9bdcabc14c536da4377307906be0 (diff)
downloadbcm5719-llvm-fecf43eba3630aeb55c56e5d308f99a7bd05bfbe.tar.gz
bcm5719-llvm-fecf43eba3630aeb55c56e5d308f99a7bd05bfbe.zip
AMDGPU/GlobalISel: Rewrite lowerFormalArguments
This should now handle everything except structs passed as multiple registers. I think most of the packing logic should be handled by handleAssignments, but I'm unclear on what the contract is for multiple registers. This is copying how x86 handles this. This does change the behavior of the test_sgpr_alignment0 amdgpu_vs test. I don't think shader arguments should try to follow the alignment, and registers need to be repacked. I also don't think it matters, since I think the pointers are packed to the beginning of the argument list anyway. llvm-svn: 366582
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