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| author | Craig Topper <craig.topper@intel.com> | 2018-03-20 23:39:48 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-03-20 23:39:48 +0000 |
| commit | d25f1acf6713752b7ec47309b3f7733ba61fa330 (patch) | |
| tree | b50d20cec6e85853ccdf6ff6f8677d0469a28ac2 /lldb/packages/Python/lldbsuite/test | |
| parent | bb059deacb8d538cf3ff14edc37e892c4301f558 (diff) | |
| download | bcm5719-llvm-d25f1acf6713752b7ec47309b3f7733ba61fa330.tar.gz bcm5719-llvm-d25f1acf6713752b7ec47309b3f7733ba61fa330.zip | |
[X86] Change PMULLD to 10 cycles on Skylake per Agner's tables and llvm-exegesis.
Also restrict to port 0 and 1 for SkylakeClient. It looks like the scheduler models don't account for client not having a full vector ALU on port 5 like server.
Fixes PR36808.
llvm-svn: 328061
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test')
0 files changed, 0 insertions, 0 deletions
