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author | Sam Parker <sam.parker@arm.com> | 2019-12-20 09:32:36 +0000 |
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committer | Sam Parker <sam.parker@arm.com> | 2019-12-20 09:34:18 +0000 |
commit | acbc9aed726d4b7428691e026a214cb26ee2cf94 (patch) | |
tree | 93e611317cbbc73893c2dad4d901d55b864d79f9 /lldb/packages/Python/lldbsuite/test | |
parent | 0ca9d2fd39264054501927ba6d3c5330159458d7 (diff) | |
download | bcm5719-llvm-acbc9aed726d4b7428691e026a214cb26ee2cf94.tar.gz bcm5719-llvm-acbc9aed726d4b7428691e026a214cb26ee2cf94.zip |
[ARM][MVE] Fixes for tail predication.
1) Fix an issue with the incorrect value being used for the number of
elements being passed to [d|w]lstp. We were trying to check that
the value was available at LoopStart, but this doesn't consider
that the last instruction in the block could also define the
register. Two helpers have been added to RDA for this.
2) Insert some code to now try to move the element count def or the
insertion point so that we can perform more tail predication.
3) Related to (1), the same off-by-one could prevent us from
generating a low-overhead loop when a mov lr could have been
the last instruction in the block.
4) Fix up some instruction attributes so that not all the
low-overhead loop instructions are labelled as branches and
terminators - as this is not true for dls/dlstp.
Differential Revision: https://reviews.llvm.org/D71609
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test')
0 files changed, 0 insertions, 0 deletions