diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-11-06 17:54:43 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-11-06 17:54:43 +0000 |
| commit | 623e6fd46678192f93e14cb07263cc32b341f11a (patch) | |
| tree | 38c0d764b5225ecb1efdd748896a9a35c180e06b /lldb/packages/Python/lldbsuite/test | |
| parent | 1063293a892f8c2d5c089be25c175b25fccf2ea5 (diff) | |
| download | bcm5719-llvm-623e6fd46678192f93e14cb07263cc32b341f11a.tar.gz bcm5719-llvm-623e6fd46678192f93e14cb07263cc32b341f11a.zip | |
AMDGPU: Hack for VS_32 register pressure
For some reason VS_32 ends up factoring into the pressure heuristics
even though we should never see a virtual register with this class.
When SGPRs are reserved for register spilling, this for some reason
triggers reg-crit scheduling.
Setting isAllocatable = 0 may help with this since that seems to remove
it from the default implementation's generated table.
llvm-svn: 252321
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test')
0 files changed, 0 insertions, 0 deletions
