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| author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2020-05-22 07:59:12 -0500 |
|---|---|---|
| committer | Tom Stellard <tstellar@redhat.com> | 2020-06-22 15:59:10 -0700 |
| commit | a8eb6a5db7f92bd13379ba51065208ce4ccace19 (patch) | |
| tree | 7db306705ba7ed7592a0b21ec900e172cd593f62 /lldb/packages/Python/lldbsuite/test/sample_test/TestSampleTest.py | |
| parent | eac91d5864010a25e7e693ad565b64467dfa6ab9 (diff) | |
| download | bcm5719-llvm-a8eb6a5db7f92bd13379ba51065208ce4ccace19.tar.gz bcm5719-llvm-a8eb6a5db7f92bd13379ba51065208ce4ccace19.zip | |
[PowerPC] Treat 'Z' inline asm constraint as a true memory constraint
We currently emit incorrect codegen for this constraint because we set it as a
constraint that allows registers. This will cause the value to be copied to the
stack and that address to be passed as the address. This is not what we want.
Fixes: https://bugs.llvm.org/show_bug.cgi?id=42762
Differential revision: https://reviews.llvm.org/D77542
(cherry picked from commit aede24ecaa08db806fb173faf2de9cff95df8cee)
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/sample_test/TestSampleTest.py')
0 files changed, 0 insertions, 0 deletions
