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authorCraig Topper <craig.topper@intel.com>2018-06-22 20:20:38 +0000
committerCraig Topper <craig.topper@intel.com>2018-06-22 20:20:38 +0000
commit9bc2c059c3796813995e662d4418e1abfa2f5d73 (patch)
treedceaa71aa2efedaae3838996ab90f1cc6bad04cf /lldb/packages/Python/lldbsuite/test/python_api
parentc835306ac58b7a5d84a1f9b0aa7e415fc2d7fc76 (diff)
downloadbcm5719-llvm-9bc2c059c3796813995e662d4418e1abfa2f5d73.tar.gz
bcm5719-llvm-9bc2c059c3796813995e662d4418e1abfa2f5d73.zip
[X86] Don't accept (%si,%bp) 16-bit address expressions.
The second register is the index register and should only be %si or %di if used with a base register. And in that case the base register should be %bp or %bx. This makes us compatible with gas. We do still need to support both orders with Intel syntax which uses [bp+si] and [si+bp] llvm-svn: 335384
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api')
0 files changed, 0 insertions, 0 deletions
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