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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-09-22 09:50:52 +0000 |
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committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-09-22 09:50:52 +0000 |
commit | 2b1c3bb25daddd3d34a85d021f1b29a91dc932e5 (patch) | |
tree | 36fa731396db565f32bc29ec92c79975b2cb12e7 /lldb/packages/Python/lldbsuite/test/python_api/thread/main2.cpp | |
parent | 489604cd1196dd899713cb31c4b7c0f1b546c56b (diff) | |
download | bcm5719-llvm-2b1c3bb25daddd3d34a85d021f1b29a91dc932e5.tar.gz bcm5719-llvm-2b1c3bb25daddd3d34a85d021f1b29a91dc932e5.zip |
[ARM] Add missing selection patterns for vnmla
For the following function:
double fn1(double d0, double d1, double d2) {
double a = -d0 - d1 * d2;
return a;
}
on ARM, LLVM generates code along the lines of
vneg.f64 d0, d0
vmls.f64 d0, d1, d2
i.e., a negate and a multiply-subtract.
The attached patch adds instruction selection patterns to allow it to generate the single instruction
vnmla.f64 d0, d1, d2
(multiply-add with negation) instead, like GCC does.
Committed on behalf of @gergo- (Gergö Barany)
Differential Revision: https://reviews.llvm.org/D35911
llvm-svn: 313972
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api/thread/main2.cpp')
0 files changed, 0 insertions, 0 deletions