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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-02-01 15:13:31 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-02-01 15:13:31 +0000 |
| commit | f8bb23e50923e550de71af44ead47cf37b486deb (patch) | |
| tree | e6f0e05af71e3a2ce6ebd0d524573b671884b62f /lldb/packages/Python/lldbsuite/test/python_api/thread/TestThreadAPI.py | |
| parent | 7e7b7b2def1fa3efb55a7af294a92a4723263f77 (diff) | |
| download | bcm5719-llvm-f8bb23e50923e550de71af44ead47cf37b486deb.tar.gz bcm5719-llvm-f8bb23e50923e550de71af44ead47cf37b486deb.zip | |
[mips] Range check uimm16 and fix several bugs this revealed.
Summary:
The bugs were:
* teq and similar take 4-bit unsigned immediates on microMIPS.
* teqi and similar have side-effects like teq do.
* shll_s.w and shra_r.w take 5-bit unsigned immediates.
* The various DSP ext* instructions take a 5-bit immediate.
* repl.qh takes an 8-bit unsigned immediate.
* repl.ph takes a 10-bit unsigned immediate.
* rddsp/wrdsp take a 10-bit unsigned immediate.
* teqi and similar take signed 16-bit immediates (10-bit for microMIPS).
* Out-of-range immediate macros for or/xor take a simm32/simm64 depending
on architecture. I'll fix the simm64 case properly when I reach simm32.
lui is a bit more lenient than GAS and accepts signed immediates in addition
to unsigned. This is because MipsMCExpr can produce signed values when
constant folding and it currently lacks a way of knowing it should fold to
an unsigned value.
Reviewers: vkalintiris
Subscribers: dsanders, llvm-commits
Differential Revision: http://reviews.llvm.org/D15446
llvm-svn: 259360
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api/thread/TestThreadAPI.py')
0 files changed, 0 insertions, 0 deletions
