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author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2016-10-04 06:59:23 +0000 |
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committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2016-10-04 06:59:23 +0000 |
commit | 11049f8f07330c30c689d54ed91d63909b360cf2 (patch) | |
tree | a70b349635cb8c9c5d445cc77595f2794e5e0dc4 /lldb/packages/Python/lldbsuite/test/python_api/thread/TestThreadAPI.py | |
parent | 6b929d5ba91eec2acd6f47c6921ce0dff9a94cd6 (diff) | |
download | bcm5719-llvm-11049f8f07330c30c689d54ed91d63909b360cf2.tar.gz bcm5719-llvm-11049f8f07330c30c689d54ed91d63909b360cf2.zip |
[Power9] Part-word VSX integer scalar loads/stores and sign extend instructions
This patch corresponds to review:
https://reviews.llvm.org/D23155
This patch removes the VSHRC register class (based on D20310) and adds
exploitation of the Power9 sub-word integer loads into VSX registers as well
as vector sign extensions.
The new instructions are useful for a few purposes:
Int to Fp conversions of 1 or 2-byte values loaded from memory
Building vectors of 1 or 2-byte integers with values loaded from memory
Storing individual 1 or 2-byte elements from integer vectors
This patch implements all of those uses.
llvm-svn: 283190
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api/thread/TestThreadAPI.py')
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