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author | Eli Friedman <efriedma@codeaurora.org> | 2017-08-01 00:28:40 +0000 |
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committer | Eli Friedman <efriedma@codeaurora.org> | 2017-08-01 00:28:40 +0000 |
commit | 37f41d1e7cc7d73711d24d6043569c6142f52a50 (patch) | |
tree | e1946df5ee7f6fb64b48d0ace8db73eb3bdf69ad /lldb/packages/Python/lldbsuite/test/python_api/target/TestTargetAPI.py | |
parent | 967e7966fc7df90b71e7ac610fa28878148adca9 (diff) | |
download | bcm5719-llvm-37f41d1e7cc7d73711d24d6043569c6142f52a50.tar.gz bcm5719-llvm-37f41d1e7cc7d73711d24d6043569c6142f52a50.zip |
[ScheduleDAG] Don't schedule node with physical register interference
https://reviews.llvm.org/D31536 didn't really solve the problem it was
trying to solve; it got rid of the assertion failure, but we were still
scheduling the DAG incorrectly (mixing together instructions from
different calls), leading to a MachineVerifier failure.
In order to schedule the DAG correctly, we have to make sure we don't
schedule a node which should be blocked by an interference. Fix
ScheduleDAGRRList::PickNodeToScheduleBottomUp so it doesn't pick a node
like that.
The added call to FindAvailableNode() is the key change here; this makes
sure we don't try to schedule a call while we're in the middle of
scheduling a different call. I'm not sure this is the right approach; in
particular, I'm not sure how to prove we don't end up with an infinite
loop of repeatedly backtracking.
This also reverts the code change from D31536. It doesn't do anything
useful: we should never schedule an ADJCALLSTACKDOWN unless we've
already scheduled the corresponding ADJCALLSTACKUP.
Differential Revision: https://reviews.llvm.org/D33818
llvm-svn: 309642
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api/target/TestTargetAPI.py')
0 files changed, 0 insertions, 0 deletions