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| author | Craig Topper <craig.topper@intel.com> | 2019-09-29 01:24:29 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-09-29 01:24:29 +0000 |
| commit | b6a2207ba23219a6965ac5461501d9d04b7b202a (patch) | |
| tree | 40d40197309c9b1b53c75971cb4b532046a2c183 /lldb/packages/Python/lldbsuite/test/python_api/signals/main.cpp | |
| parent | 0ac4aacea83b0145e06073186b77d3bae94e917d (diff) | |
| download | bcm5719-llvm-b6a2207ba23219a6965ac5461501d9d04b7b202a.tar.gz bcm5719-llvm-b6a2207ba23219a6965ac5461501d9d04b7b202a.zip | |
[X86] Move bitselect matching to vpternlog into X86ISelDAGToDAG.cpp
This allows us to reduce the use count on the condition node before
the match. This enables load folding for that operand without
relying on the peephole pass. This will be improved on for
broadcast load folding in a subsequent commit.
This still requires a bunch of isel patterns for vXi16/vXi8 types
though.
llvm-svn: 373156
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api/signals/main.cpp')
0 files changed, 0 insertions, 0 deletions
