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| author | Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> | 2019-09-03 19:35:07 +0000 |
|---|---|---|
| committer | Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> | 2019-09-03 19:35:07 +0000 |
| commit | b0eb394417a723c30ea7be549e6f253771a889c7 (patch) | |
| tree | a9a6a8b5aa291a309f82552013c5831bd4223c24 /lldb/packages/Python/lldbsuite/test/python_api/signals/main.cpp | |
| parent | 4a07bba31c003949457147a2acce393a54dc95dc (diff) | |
| download | bcm5719-llvm-b0eb394417a723c30ea7be549e6f253771a889c7.tar.gz bcm5719-llvm-b0eb394417a723c30ea7be549e6f253771a889c7.zip | |
[CodeGen] Use FSHR in DAGTypeLegalizer::ExpandIntRes_MULFIX
Summary:
Simplify the right shift of the intermediate result (given
in four parts) by using funnel shift.
There are some impact on lit tests, but that seems to be
related to register allocation differences due to how FSHR
is expanded on X86 (giving a slightly different operand order
for the OR operations compared to the old code).
Reviewers: leonardchan, RKSimon, spatel, lebedev.ri
Reviewed By: RKSimon
Subscribers: hiraditya, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, s.egerton, pzheng, bevinh, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67036
llvm-svn: 370813
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api/signals/main.cpp')
0 files changed, 0 insertions, 0 deletions
