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| author | Tom Stellard <thomas.stellard@amd.com> | 2016-04-14 16:27:07 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2016-04-14 16:27:07 +0000 |
| commit | 79a1fd718c71b4480dc9f00e8e77f4408ec9e6fa (patch) | |
| tree | d7ad0eed911b428e15f871225d742595de9420b8 /lldb/packages/Python/lldbsuite/test/python_api/signals/main.cpp | |
| parent | f110f8f9f7f46c668e03f4808e03aa54c2157269 (diff) | |
| download | bcm5719-llvm-79a1fd718c71b4480dc9f00e8e77f4408ec9e6fa.tar.gz bcm5719-llvm-79a1fd718c71b4480dc9f00e8e77f4408ec9e6fa.zip | |
AMDGPU: allow specifying a workgroup size that needs to fit in a compute unit
Summary:
For GL_ARB_compute_shader we need to support workgroup sizes of at least 1024. However, if we want to allow large workgroup sizes, we may need to use less registers, as we have to run more waves per SIMD.
This patch adds an attribute to specify the maximum work group size the compiled program needs to support. It defaults, to 256, as that has no wave restrictions.
Reducing the number of registers available is done similarly to how the registers were reserved for chips with the sgpr init bug.
Reviewers: mareko, arsenm, tstellarAMD, nhaehnle
Subscribers: FireBurn, kerberizer, llvm-commits, arsenm
Differential Revision: http://reviews.llvm.org/D18340
Patch By: Bas Nieuwenhuizen
llvm-svn: 266337
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api/signals/main.cpp')
0 files changed, 0 insertions, 0 deletions
