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authorSjoerd Meijer <sjoerd.meijer@arm.com>2018-02-27 19:26:02 +0000
committerSjoerd Meijer <sjoerd.meijer@arm.com>2018-02-27 19:26:02 +0000
commitfc0d02cbbfaaa91bf09666bffb2c2f64342bdd07 (patch)
tree78e630f29b1e2ab2e24fc486d052b08fd44de984 /lldb/packages/Python/lldbsuite/test/python_api/signals/TestSignalsAPI.py
parentde979bfe58a27d7d228b87ac32aeb17dd502c7bc (diff)
downloadbcm5719-llvm-fc0d02cbbfaaa91bf09666bffb2c2f64342bdd07.tar.gz
bcm5719-llvm-fc0d02cbbfaaa91bf09666bffb2c2f64342bdd07.zip
[ARM] Another f16 litpool fix
We were always setting the block alignment to 2 bytes in Thumb mode and 4-bytes in ARM mode (r325754, and r325012), but this could cause reducing the block alignment when it already had been aligned (e.g. in Thumb mode when the block is a CPE that was already 4-byte aligned). Patch by Momchil Velikov, I've only added a test. Differential Revision: https://reviews.llvm.org/D43777 llvm-svn: 326232
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