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| author | Mikhail Maltsev <mikhail.maltsev@arm.com> | 2019-07-08 09:44:52 +0000 |
|---|---|---|
| committer | Mikhail Maltsev <mikhail.maltsev@arm.com> | 2019-07-08 09:44:52 +0000 |
| commit | ee81051fc96a6e1fe1c4efba75db8e368f918aa4 (patch) | |
| tree | a4d5ca4238f6709e2f9da9dcab3ca73d8b6d92bf /lldb/packages/Python/lldbsuite/test/python_api/sbstructureddata/TestStructuredDataAPI.py | |
| parent | 77d4a8f9f7c99172105f184cbb71f052081ccf02 (diff) | |
| download | bcm5719-llvm-ee81051fc96a6e1fe1c4efba75db8e368f918aa4.tar.gz bcm5719-llvm-ee81051fc96a6e1fe1c4efba75db8e368f918aa4.zip | |
[ARM] Relax constraints on operands of VQxDMLxDH instructions
Summary:
According to a recently updated Armv8-M spec
(https://static.docs.arm.com/ddi0553/bh/DDI0553B_h_armv8m_arm.pdf) the
32-bit width versions of the following instructions:
* VQDMLADH
* VQDMLADHX
* VQRDMLADH
* VQRDMLADHX
* VQDMLSDH
* VQDMLSDHX
* VQRDMLSDH
* VQRDMLSDHX
are no longer unpredictable when their output register is the same as
one of the input registers.
This patch updates the assembler parser and the corresponding tests
and also removes @earlyclobber from the instruction constraints.
Reviewers: simon_tatham, ostannard, dmgreen, SjoerdMeijer, samparker
Reviewed By: simon_tatham
Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64250
llvm-svn: 365306
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api/sbstructureddata/TestStructuredDataAPI.py')
0 files changed, 0 insertions, 0 deletions
