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author | Sanne Wouda <Sanne.Wouda@arm.com> | 2019-12-05 18:09:08 +0000 |
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committer | Sanne Wouda <Sanne.Wouda@arm.com> | 2019-12-05 18:10:06 +0000 |
commit | e503fee904d8c17c089d27ab928bc72eeeece649 (patch) | |
tree | 2fdd14adde4dd4a3ed465f5906952cbccb5c4990 /lldb/packages/Python/lldbsuite/test/python_api/process | |
parent | fffd70291e124efc4a5bd475dccfc41cbc4bca8a (diff) | |
download | bcm5719-llvm-e503fee904d8c17c089d27ab928bc72eeeece649.tar.gz bcm5719-llvm-e503fee904d8c17c089d27ab928bc72eeeece649.zip |
[AArch64] Fix MUL/SUB fusing
Summary:
When MUL is the first operand to SUB, we can't use MLS because the accumulator
should be negated. Emit a NEG of the accumulator and an MLA instead, similar to
what we do for FMUL / FSUB fusing.
Reviewers: dmgreen, SjoerdMeijer, fhahn, Gerolf, mstorsjo, asbirlea
Reviewed By: asbirlea
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71067
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api/process')
0 files changed, 0 insertions, 0 deletions