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| author | Craig Topper <craig.topper@intel.com> | 2019-09-26 22:23:09 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-09-26 22:23:09 +0000 |
| commit | c89872497457676bbbb564155cc669d587614d00 (patch) | |
| tree | 1bbcde758bae019e3664a74514b7d33ae27af320 /lldb/packages/Python/lldbsuite/test/python_api/process/main.cpp | |
| parent | f98d2c099a45f323a5cc45eb4f38865044090a8b (diff) | |
| download | bcm5719-llvm-c89872497457676bbbb564155cc669d587614d00.tar.gz bcm5719-llvm-c89872497457676bbbb564155cc669d587614d00.zip | |
[X86] Add CodeGenOnly instructions for (f32 (X86selects $mask, (loadf32 addr), fp32imm0) to use masked MOVSS from memory.
Similar for f64 and having a non-zero passthru value.
We were previously not trying to fold the load at all. Using
a CodeGenOnly instruction allows us to use FR32X/FR64X as the
register class to avoid a bunch of COPY_TO_REGCLASS.
llvm-svn: 373021
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api/process/main.cpp')
0 files changed, 0 insertions, 0 deletions
