diff options
author | Roman Lebedev <lebedev.ri@gmail.com> | 2019-10-02 23:02:12 +0000 |
---|---|---|
committer | Roman Lebedev <lebedev.ri@gmail.com> | 2019-10-02 23:02:12 +0000 |
commit | ae3315af075975873df7a33e3835f2170f860b46 (patch) | |
tree | 4f18f6372ca209b1c36d69fbd172832a88e49e07 /lldb/packages/Python/lldbsuite/test/python_api/process/TestProcessAPI.py | |
parent | 29339149c34d1b8c0058ad863ea8c1b163a70171 (diff) | |
download | bcm5719-llvm-ae3315af075975873df7a33e3835f2170f860b46.tar.gz bcm5719-llvm-ae3315af075975873df7a33e3835f2170f860b46.zip |
[InstCombine] Bypass high bit extract before variable sign-extension (PR43523)
https://rise4fun.com/Alive/8BY - valid for lshr+trunc+variable sext
https://rise4fun.com/Alive/7jk - the variable sext can be redundant
https://rise4fun.com/Alive/Qslu - 'exact'-ness of first shift can be preserver
https://rise4fun.com/Alive/IF63 - without trunc we could view this as
more general "drop redundant mask before right-shift",
but let's handle it here for now
https://rise4fun.com/Alive/iip - likewise, without trunc, variable sext can be redundant.
There's more patterns for sure - e.g. we can have 'lshr' as the final shift,
but that might be best handled by some more generic transform, e.g.
"drop redundant masking before right-shift" (PR42456)
I'm singling-out this sext patch because you can only extract
high bits with `*shr` (unlike abstract bit masking),
and i *know* this fold is wanted by existing code.
I don't believe there is much to review here,
so i'm gonna opt into post-review mode here.
https://bugs.llvm.org/show_bug.cgi?id=43523
llvm-svn: 373542
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api/process/TestProcessAPI.py')
0 files changed, 0 insertions, 0 deletions