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authorCraig Topper <craig.topper@gmail.com>2016-09-30 04:31:33 +0000
committerCraig Topper <craig.topper@gmail.com>2016-09-30 04:31:33 +0000
commitbc6e97b8f43bc1d8340632947bab3cade6186df1 (patch)
treecd8288173b3f079735e35993c4c5ab423afa87d7 /lldb/packages/Python/lldbsuite/test/python_api/interpreter/main.c
parentf57cc62abf4d2d5fec91716372d060662d678fc8 (diff)
downloadbcm5719-llvm-bc6e97b8f43bc1d8340632947bab3cade6186df1.tar.gz
bcm5719-llvm-bc6e97b8f43bc1d8340632947bab3cade6186df1.zip
[AVX-512] Always use the full 32 register vector classes for addRegisterClass regardless of whether AVX512/VLX is enabled or not.
If AVX512 is disabled, the registers should already be marked reserved. Pattern predicates and register classes on instructions should take care of most of the rest. Loads/stores and physical register copies for XMM16-31 and YMM16-31 without VLX have already been taken care of. I'm a little unclear why this changed the register allocation of the SSE2 run of the sad.ll test, but the registers selected appear to be valid after this change. llvm-svn: 282835
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