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| author | Craig Topper <craig.topper@intel.com> | 2019-04-11 19:19:52 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-04-11 19:19:52 +0000 |
| commit | 586fad50ac47fbb110737ce7ea2f503c609472ab (patch) | |
| tree | dacc4a3f85dec711bc93337adf42f5eee7e0128e /lldb/packages/Python/lldbsuite/test/python_api/interpreter/TestCommandInterpreterAPI.py | |
| parent | f7e548c076f6aaeaabb9ea2b0f62347219323597 (diff) | |
| download | bcm5719-llvm-586fad50ac47fbb110737ce7ea2f503c609472ab.tar.gz bcm5719-llvm-586fad50ac47fbb110737ce7ea2f503c609472ab.zip | |
[X86] Add patterns for using movss/movsd for atomic load/store of f32/64. Remove atomic fadd pseudos use isel patterns instead.
This patch adds patterns for turning bitcasted atomic load/store into movss/sd.
It also removes the pseudo instructions for atomic RMW fadd. Instead just adding isel patterns for folding an atomic load into addss/sd. And relying on the new movss/sd store pattern to handle the write part.
This also makes the fadd patterns use VEX and EVEX instructions when AVX or AVX512F are enabled.
Differential Revision: https://reviews.llvm.org/D60394
llvm-svn: 358215
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api/interpreter/TestCommandInterpreterAPI.py')
0 files changed, 0 insertions, 0 deletions
