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authorQuentin Colombet <qcolombet@apple.com>2016-05-09 19:01:46 +0000
committerQuentin Colombet <qcolombet@apple.com>2016-05-09 19:01:46 +0000
commit86098ab10b3180a09762266d1f3046eb6f336137 (patch)
treeec61918bf54f1ce330d6c9d2061e090b6e497f28 /lldb/packages/Python/lldbsuite/test/python_api/frame/TestFrames.py
parent52d8e3bd4c0ae48279d624d3540ef1d3db63c261 (diff)
downloadbcm5719-llvm-86098ab10b3180a09762266d1f3046eb6f336137.tar.gz
bcm5719-llvm-86098ab10b3180a09762266d1f3046eb6f336137.zip
Reapply [X86] Add a new LOW32_ADDR_ACCESS_RBP register class.
This reapplies commit r268796, with a fix for the setting of the inline asm constraints. I.e., "mark" LOW32_ADDR_ACCESS_RBP as a GR variant, so that the regular processing of the GR operands (setting of the subregisters) happens. Original commit log: [X86] Add a new LOW32_ADDR_ACCESS_RBP register class. ABIs like NaCl uses 32-bit addresses but have 64-bit frame. The new register class reflects those constraints when choosing a register class for a address access. llvm-svn: 268955
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api/frame/TestFrames.py')
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