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authorSimon Atanasyan <simon@atanasyan.com>2019-04-02 13:57:32 +0000
committerSimon Atanasyan <simon@atanasyan.com>2019-04-02 13:57:32 +0000
commit2634a141fdf40475d16fe7b50160c55817227d56 (patch)
tree4fa00c853c0687fcd054d589aca9828b96415281 /lldb/packages/Python/lldbsuite/test/python_api/frame/TestFrames.py
parentdeef72091a3b2d9d191141126d922731e9539d81 (diff)
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[mips] Use AltOrders to prevent using odd FP-registers
To disable using of odd floating-point registers (O32 ABI and -mno-odd-spreg command line option) such registers and their super-registers added to the set of reserved registers. In general, it works. But there is at least one problem - in case of enabled machine verifier pass some floating-point tests failed because live ranges of register units that are reserved is not empty and verification pass failed with "Live segment doesn't end at a valid instruction" error message. There is D35985 patch which tries to solve the problem by explicit removing of register units. This solution did not get approval. I would like to use another approach for prevent using odd floating point registers - define `AltOrders` and `AltOrderSelect` for MIPS floating point register classes. Such `AltOrders` contains reduced set of registers. At first glance, such solution does not break any test cases and allows enabling machine instruction verification for all MIPS test cases. Differential Revision: http://reviews.llvm.org/D59799 llvm-svn: 357472
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