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authorCraig Topper <craig.topper@intel.com>2019-04-12 06:49:28 +0000
committerCraig Topper <craig.topper@intel.com>2019-04-12 06:49:28 +0000
commit3b1239d2a86ffc6158130f57a893b64a5221d659 (patch)
treefefd95416fc72b98853af1801562bb93a5ac2f6c /lldb/packages/Python/lldbsuite/test/python_api/debugger/TestDebuggerAPI.py
parent6f8f98ce8de7c0e4ebd7fa2e1fd9507fe8d1c317 (diff)
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[TargetLowering][X86] Teach SimplifyDemandedBits to use ShrinkDemandedOp on ISD::SHL nodes.
If the upper bits of the SHL result aren't used, we might be able to use a narrower shift. For example, on X86 this can turn a 64-bit into 32-bit enabling a smaller encoding. Differential Revision: https://reviews.llvm.org/D60358 llvm-svn: 358257
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