diff options
| author | Michael Zuckerman <Michael.zuckerman@intel.com> | 2015-12-02 14:34:34 +0000 |
|---|---|---|
| committer | Michael Zuckerman <Michael.zuckerman@intel.com> | 2015-12-02 14:34:34 +0000 |
| commit | 15152a5c4142ad871e81596992b6c5d0a59922e6 (patch) | |
| tree | 85dda06b29086d136854ec255814817de96dc895 /lldb/packages/Python/lldbsuite/test/python_api/breakpoint/TestBreakpointAPI.py | |
| parent | 57a23151ca75258c648b3eb238ae9c6231aa933c (diff) | |
| download | bcm5719-llvm-15152a5c4142ad871e81596992b6c5d0a59922e6.tar.gz bcm5719-llvm-15152a5c4142ad871e81596992b6c5d0a59922e6.zip | |
By intel spec
|9B DD /7| FSTSW m2byte| Valid Valid Store FPU status word at m2byteafter checking for pending unmasked floating-point exceptions.|
|9B DF E0| FSTSW AX| Valid Valid Store FPU status word in AX register after checking for pending unmasked floating-point exceptions.|
|DD /7 |FNSTSW *m2byte| Valid Valid Store FPU status word at m2bytewithout checking for pending unmasked floating-point exceptions.|
|DF E0 |FNSTSW *AX| Valid Valid Store FPU status word in AX register without checking for pending unmasked floating-point exceptions|
m2byte is word register, and therefor instruction operand need to be change from f32mem to i16mem.
Differential Revision: http://reviews.llvm.org/D14953
llvm-svn: 254512
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api/breakpoint/TestBreakpointAPI.py')
0 files changed, 0 insertions, 0 deletions
