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| author | Craig Topper <craig.topper@intel.com> | 2018-11-15 18:59:31 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-11-15 18:59:31 +0000 |
| commit | 73bb04ab6ff0efdfc38cc2c9fa176f6ee28700f7 (patch) | |
| tree | d8141e832d326fd728e18715cd400d3bb4648794 /lldb/packages/Python/lldbsuite/test/macosx/universal/TestUniversal.py | |
| parent | fc3163b67a87e93e8beda976ccd16418ca879284 (diff) | |
| download | bcm5719-llvm-73bb04ab6ff0efdfc38cc2c9fa176f6ee28700f7.tar.gz bcm5719-llvm-73bb04ab6ff0efdfc38cc2c9fa176f6ee28700f7.zip | |
[X86] Add -x86-experimental-vector-widening support to reduceVMULWidth and combineMulToPMADDWD
In reduceVMULWidth, we no longer need to worry about extending the vector to 128 bits first. Regular widening of extends, muls and shuffles will take care of that for us.
In combineMulToPMADDWD, we can handle v2i32 multiplies and allow the VPMADDWD to be widened to v4i32 during type legalization by adding custom widening like we do have for AVG/ADDUS/SUBUS. I had to modify that code a little to allow different and output VTs.
Differential Revision: https://reviews.llvm.org/D54512
llvm-svn: 346980
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/macosx/universal/TestUniversal.py')
0 files changed, 0 insertions, 0 deletions
