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| author | Diego Caballero <diego.caballero@intel.com> | 2018-07-09 15:57:09 +0000 |
|---|---|---|
| committer | Diego Caballero <diego.caballero@intel.com> | 2018-07-09 15:57:09 +0000 |
| commit | d09530144a5412a01d222a77257ab2be12d977f1 (patch) | |
| tree | 3cb9a6d79bdda57b84a0fa940a5507a1b5682ab4 /lldb/packages/Python/lldbsuite/test/lock.py | |
| parent | 48db19e95a711d0a0e0f7ed835f9bfcb2c1b4892 (diff) | |
| download | bcm5719-llvm-d09530144a5412a01d222a77257ab2be12d977f1.tar.gz bcm5719-llvm-d09530144a5412a01d222a77257ab2be12d977f1.zip | |
[VPlan][LV] Introduce condition bit in VPBlockBase
This patch introduces a VPValue in VPBlockBase to represent the condition
bit that is used as successor selector when a block has multiple successors.
This information wasn't necessary until now, when we are about to introduce
outer loop vectorization support in VPlan code gen.
Reviewers: fhahn, rengolin, mkuper, hfinkel, mssimpso
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D48814
llvm-svn: 336554
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/lock.py')
0 files changed, 0 insertions, 0 deletions
