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| author | Craig Topper <craig.topper@intel.com> | 2019-01-16 21:46:28 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-01-16 21:46:28 +0000 |
| commit | 5ea31207186b032d031f4b1499b15a8613b60698 (patch) | |
| tree | 20d8983c23118ab1c4eed9c49d4f60f7f2cff141 /lldb/packages/Python/lldbsuite/test/lang/cpp/std-function-step-into-callable/main.cpp | |
| parent | fe9269f804afce78827a11181e4b6a96007a0338 (diff) | |
| download | bcm5719-llvm-5ea31207186b032d031f4b1499b15a8613b60698.tar.gz bcm5719-llvm-5ea31207186b032d031f4b1499b15a8613b60698.zip | |
[X86] Use X86ISD::BLENDV for blendv intrinsics. Replace vselect with blendv just before isel table lookup. Remove vselect isel patterns.
This cleans up the duplication we have with both intrinsic isel patterns and vselect isel patterns. This should also allow the intrinsics to get SimplifyDemandedBits support for the condition.
I've switched the canonical pattern in isel to use the X86ISD::BLENDV node instead of VSELECT. Since it always seemed weird to move from BLENDV with its relaxed rules on condition bits to VSELECT which has strict rules about all bits of the condition element being the same. Its more correct to go from VSELECT to BLENDV.
Differential Revision: https://reviews.llvm.org/D56771
llvm-svn: 351380
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/lang/cpp/std-function-step-into-callable/main.cpp')
0 files changed, 0 insertions, 0 deletions
