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| author | Craig Topper <craig.topper@intel.com> | 2018-03-16 17:13:42 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-03-16 17:13:42 +0000 |
| commit | e6913ec3400b3e23fc134097ebebb05be5330b66 (patch) | |
| tree | a7f7089d631624290408c07341fb4d8809be489b /lldb/packages/Python/lldbsuite/test/lang/cpp/function-template-parameter-pack/TestFunctionTemplateParameterPack.py | |
| parent | 4c8f4234b664fb49c4b518bc19f0073c0c112868 (diff) | |
| download | bcm5719-llvm-e6913ec3400b3e23fc134097ebebb05be5330b66.tar.gz bcm5719-llvm-e6913ec3400b3e23fc134097ebebb05be5330b66.zip | |
[X86] Post process the DAG after isel to remove vector moves that were added to zero upper bits.
We previously avoided inserting these moves during isel in a few cases which is implemented using a whitelist of opcodes. But it's too difficult to generate a perfect list of opcodes to whitelist. Especially with AVX512F without AVX512VL using 512 bit vectors to implement some 128/256 bit operations. Since isel is done bottoms up, we'd have to check the VT and opcode and subtarget in order to determine whether an EXTRACT_SUBREG would be generated for some operations.
So instead of doing that, this patch adds a post processing step that detects when the moves are unnecesssary after isel. At that point any EXTRACT_SUBREGs would have already been created and appear in the DAG. So then we just need to ensure the input to the move isn't one.
Differential Revision: https://reviews.llvm.org/D44289
llvm-svn: 327724
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/lang/cpp/function-template-parameter-pack/TestFunctionTemplateParameterPack.py')
0 files changed, 0 insertions, 0 deletions
