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| author | Craig Topper <craig.topper@intel.com> | 2018-03-08 08:02:52 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-03-08 08:02:52 +0000 |
| commit | a406796f5f690da895015c4106a9289d88408c93 (patch) | |
| tree | 23ec944a7ebfe005996198aa42175b5d88812fae /lldb/packages/Python/lldbsuite/test/help/TestHelp.py | |
| parent | 0feb0b9059792596e8386d030fa3d0aed9527798 (diff) | |
| download | bcm5719-llvm-a406796f5f690da895015c4106a9289d88408c93.tar.gz bcm5719-llvm-a406796f5f690da895015c4106a9289d88408c93.zip | |
[X86] Change X86::PMULDQ/PMULUDQ opcodes to take vXi64 type as input instead of vXi32.
This instruction can be thought of as reading either the even elements of a vXi32 input or the lower half of each element of a vXi64 input. We currently use the vXi32 interpretation, but vXi64 matches better with its broadcast behavior in EVEX.
I'm looking at moving MULDQ/MULUDQ creation to a DAG combine so we can do it when AVX512DQ is enabled without having to go through Custom lowering. But in some of the test cases we failed to use a broadcast load due to the size difference. This should help with that.
I'm also wondering if we can model these instructions in native IR and remove the intrinsics and I think using a vXi64 type will work better with that.
llvm-svn: 326991
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/help/TestHelp.py')
0 files changed, 0 insertions, 0 deletions
