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authorSimon Pilgrim <llvm-dev@redking.me.uk>2018-04-30 18:18:38 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2018-04-30 18:18:38 +0000
commit3c35408e487b6c364df14447d3096766936a2817 (patch)
tree7ffed037034f90bbdd6f0c19725ffb7ec3d4f478 /lldb/packages/Python/lldbsuite/test/help/TestHelp.py
parent395ab2e21254e9c6ae6cebf045a6118613bd0ef3 (diff)
downloadbcm5719-llvm-3c35408e487b6c364df14447d3096766936a2817.tar.gz
bcm5719-llvm-3c35408e487b6c364df14447d3096766936a2817.zip
[X86] Introduce X86SchedWriteWidths schedule wrapper for different vector widths.
We need to split most of the scheduler classes by vector width to remove more of the InstRW overrides, this patch should make this easier/tidier by allowing us to pass the X86SchedWriteWidths wrapper to multi-width multiclasses and then split as required. I've included fields for Scl (scalar float/double), MMX (MMX integer), XMM, YMM and ZMM widths. These fields mostly share the same classes but it should give us the flexibility that we may need in the future. This patch has replaced a set of example SSE/AVX512 instruction cases but isn't exhaustive as it gets very noisy before we really need the functionality. Differential Revision: https://reviews.llvm.org/D46266 llvm-svn: 331208
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