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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-08-01 18:27:11 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-08-01 18:27:11 +0000 |
| commit | aff2995f46ec2a38dffcdb3ad5a9cd02197ca7f9 (patch) | |
| tree | e8e40820888a52a3c427735476d292a787c7c6e3 /lldb/packages/Python/lldbsuite/test/functionalities/non-overlapping-index-variable-i/main.cpp | |
| parent | 20b198ec5ea70de87bcfac2d27b6f4be8b41b986 (diff) | |
| download | bcm5719-llvm-aff2995f46ec2a38dffcdb3ad5a9cd02197ca7f9.tar.gz bcm5719-llvm-aff2995f46ec2a38dffcdb3ad5a9cd02197ca7f9.zip | |
AMDGPU: Use tablegen pattern for sendmsg intrinsics
Since this now emits a direct copy to m0, SIFixSGPRCopies has to
handle a physical register.
llvm-svn: 367593
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/functionalities/non-overlapping-index-variable-i/main.cpp')
0 files changed, 0 insertions, 0 deletions
