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| author | Amara Emerson <aemerson@apple.com> | 2019-07-23 22:05:13 +0000 |
|---|---|---|
| committer | Amara Emerson <aemerson@apple.com> | 2019-07-23 22:05:13 +0000 |
| commit | 511f7f5785e58a75fd82675336fa7fc90ba45c76 (patch) | |
| tree | a4fff33fad3c51ccd5fae9672889196d50666b67 /lldb/packages/Python/lldbsuite/test/functionalities/load_unload/TestLoadUnload.py | |
| parent | 78b1e777f59a26d667d6a5258138cc09cf146c18 (diff) | |
| download | bcm5719-llvm-511f7f5785e58a75fd82675336fa7fc90ba45c76.tar.gz bcm5719-llvm-511f7f5785e58a75fd82675336fa7fc90ba45c76.zip | |
[AArch64][GlobalISel] Add support for s128 loads, stores, extracts, truncs.
We need to be able to load and store s128 for memcpy inlining, where we want to
generate Q register mem ops. Making these legal also requires that we add some
support in other instructions. Regbankselect should also know about these since
they have no GPR register class that can hold them, so need special handling to
live on the FPR bank.
Differential Revision: https://reviews.llvm.org/D65166
llvm-svn: 366857
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/functionalities/load_unload/TestLoadUnload.py')
0 files changed, 0 insertions, 0 deletions
